Classes | Typedefs | Enumerations | Functions | Variables

nanojit Namespace Reference

Classes

class  Allocator
 Allocator is a bump-pointer allocator with an SPI for getting more memory from embedder-implemented allocator, such as malloc()/free(). More...
class  AR
class  Noise
class  LabelState
class  LabelStateMap
class  Assembler
 Information about the activation record for the method is built up as we generate machine code. More...
class  CodeList
 CodeList is a single block of code. More...
class  CodeAlloc
 Code memory allocator is a long lived manager for many code blocks that manages interaction with an underlying code memory allocator, sets page permissions. More...
class  BitSet
 simple linear bit array, memory taken from Allocator warning: when bit array grows, old memory is wasted since it was allocated from Allocator. More...
class  Seq
 Seq is a single node in a linked list. More...
class  SeqBuilder
 SeqBuilder is used to create a linked list of Seq<T> by inserting nodes either at the beginning, with insert(), or at the end, with add(). More...
struct  DefaultHash
struct  DefaultHash< K * >
class  HashMap
 Bucket hashtable with a fixed # of buckets (never rehash) Intended for use when a reasonable # of buckets can be estimated ahead of time. More...
class  TreeMap
 Simple binary tree. More...
class  Fragment
 Fragments are linear sequences of native code that have a single entry point at the start of the fragment and may have one or more exit points. More...
struct  MiniAccSet
struct  CallInfo
struct  SwitchInfo
class  LIns
class  LInsOp0
class  LInsOp1
class  LInsOp2
class  LInsOp3
class  LInsLd
class  LInsSt
class  LInsSk
class  LInsC
class  LInsP
class  LInsI
class  LInsQorD
class  LInsJtbl
class  LInsNone
class  LirWriter
class  ExprFilter
class  CseFilter
class  LirBuffer
class  LirBufWriter
class  LirFilter
class  LirReader
struct  Interval
struct  GuardRecord
struct  SideExit
class  RegAlloc

Typedefs

typedef SeqBuilder< NIns * > NInsList
typedef HashMap< NIns *, LIns * > NInsMap
typedef HashMap< SideExit
*, RegAlloc * > 
RegAllocMap
 map tracking the register allocation state at each bailout point (represented by SideExit*) in a trace fragment.
typedef uint32_t AccSet
typedef uint8_t MiniAccSetVal
typedef SeqBuilder< LIns * > InsList
typedef SeqBuilder< char * > StringList
typedef uint32_t Register
typedef uint32_t RegisterMask
typedef uint8_t NIns

Enumerations

enum  AssmError { None = 0, StackFull, UnknownBranch, BranchTooFar }
enum  LOpcode
enum  AbiKind { ABI_FASTCALL, ABI_THISCALL, ABI_STDCALL, ABI_CDECL }
enum  ArgType {
  ARGTYPE_V = 0, ARGTYPE_I = 1, ARGTYPE_UI = 2, ARGTYPE_D = 4,
  ARGTYPE_P = ARGTYPE_I, ARGTYPE_B = ARGTYPE_I
}
enum  IndirectCall { CALL_INDIRECT = 0 }
enum  LoadQual { LOAD_CONST = 0, LOAD_NORMAL = 1, LOAD_VOLATILE = 2 }
enum  LTy { LTy_V, LTy_I, LTy_D, LTy_P = LTy_I }
enum  LInsRepKind {
  LRK_Op0, LRK_Op1, LRK_Op2, LRK_Op3,
  LRK_Ld, LRK_St, LRK_Sk, LRK_C,
  LRK_P, LRK_I, LRK_QorD, LRK_Jtbl,
  LRK_None
}
enum  X64Opcode {
  X64_addqrr = 0xC003480000000003LL, X64_addqri = 0xC081480000000003LL, X64_addqr8 = 0x00C0834800000004LL, X64_andqri = 0xE081480000000003LL,
  X64_andqr8 = 0x00E0834800000004LL, X64_orqri = 0xC881480000000003LL, X64_orqr8 = 0x00C8834800000004LL, X64_xorqri = 0xF081480000000003LL,
  X64_xorqr8 = 0x00F0834800000004LL, X64_addlri = 0xC081400000000003LL, X64_addlr8 = 0x00C0834000000004LL, X64_andlri = 0xE081400000000003LL,
  X64_andlr8 = 0x00E0834000000004LL, X64_orlri = 0xC881400000000003LL, X64_orlr8 = 0x00C8834000000004LL, X64_sublri = 0xE881400000000003LL,
  X64_sublr8 = 0x00E8834000000004LL, X64_xorlri = 0xF081400000000003LL, X64_xorlr8 = 0x00F0834000000004LL, X64_addrr = 0xC003400000000003LL,
  X64_andqrr = 0xC023480000000003LL, X64_andrr = 0xC023400000000003LL, X64_call = 0x00000000E8000005LL, X64_callrax = 0xD0FF000000000002LL,
  X64_cmovqno = 0xC0410F4800000004LL, X64_cmovqnae = 0xC0420F4800000004LL, X64_cmovqnb = 0xC0430F4800000004LL, X64_cmovqne = 0xC0450F4800000004LL,
  X64_cmovqna = 0xC0460F4800000004LL, X64_cmovqnbe = 0xC0470F4800000004LL, X64_cmovqnge = 0xC04C0F4800000004LL, X64_cmovqnl = 0xC04D0F4800000004LL,
  X64_cmovqng = 0xC04E0F4800000004LL, X64_cmovqnle = 0xC04F0F4800000004LL, X64_cmovno = 0xC0410F4000000004LL, X64_cmovnae = 0xC0420F4000000004LL,
  X64_cmovnb = 0xC0430F4000000004LL, X64_cmovne = 0xC0450F4000000004LL, X64_cmovna = 0xC0460F4000000004LL, X64_cmovnbe = 0xC0470F4000000004LL,
  X64_cmovnge = 0xC04C0F4000000004LL, X64_cmovnl = 0xC04D0F4000000004LL, X64_cmovng = 0xC04E0F4000000004LL, X64_cmovnle = 0xC04F0F4000000004LL,
  X64_cmplr = 0xC03B400000000003LL, X64_cmpqr = 0xC03B480000000003LL, X64_cmplri = 0xF881400000000003LL, X64_cmpqri = 0xF881480000000003LL,
  X64_cmplr8 = 0x00F8834000000004LL, X64_cmpqr8 = 0x00F8834800000004LL, X64_cvtsi2sd = 0xC02A0F40F2000005LL, X64_cvtsq2sd = 0xC02A0F48F2000005LL,
  X64_cvtss2sd = 0xC05A0F40F3000005LL, X64_cvtsd2ss = 0xC05A0F40F2000005LL, X64_cvtsd2si = 0xC02D0F40F2000005LL, X64_cvttsd2si = 0xC02C0F40F2000005LL,
  X64_divsd = 0xC05E0F40F2000005LL, X64_mulsd = 0xC0590F40F2000005LL, X64_addsd = 0xC0580F40F2000005LL, X64_idiv = 0xF8F7400000000003LL,
  X64_imul = 0xC0AF0F4000000004LL, X64_imuli = 0xC069400000000003LL, X64_imul8 = 0x00C06B4000000004LL, X64_jmpi = 0x0000000025FF0006LL,
  X64_jmp = 0x00000000E9000005LL, X64_jmp8 = 0x00EB000000000002LL, X64_jo = 0x00000000800F0006LL, X64_jb = 0x00000000820F0006LL,
  X64_jae = 0x00000000830F0006LL, X64_ja = 0x00000000870F0006LL, X64_jbe = 0x00000000860F0006LL, X64_je = 0x00000000840F0006LL,
  X64_jl = 0x000000008C0F0006LL, X64_jge = 0x000000008D0F0006LL, X64_jg = 0x000000008F0F0006LL, X64_jle = 0x000000008E0F0006LL,
  X64_jp = 0x000000008A0F0006LL, X64_jneg = 0x0000000001000000LL, X64_jo8 = 0x0070000000000002LL, X64_jb8 = 0x0072000000000002LL,
  X64_jae8 = 0x0073000000000002LL, X64_ja8 = 0x0077000000000002LL, X64_jbe8 = 0x0076000000000002LL, X64_je8 = 0x0074000000000002LL,
  X64_jne8 = 0x0075000000000002LL, X64_jl8 = 0x007C000000000002LL, X64_jge8 = 0x007D000000000002LL, X64_jg8 = 0x007F000000000002LL,
  X64_jle8 = 0x007E000000000002LL, X64_jp8 = 0x007A000000000002LL, X64_jnp8 = 0x007B000000000002LL, X64_jneg8 = 0x0001000000000000LL,
  X64_leaqrm = 0x00000000808D4807LL, X64_lealrm = 0x00000000808D4007LL, X64_learip = 0x00000000058D4807LL, X64_movlr = 0xC08B400000000003LL,
  X64_movbmr = 0x0000000080884007LL, X64_movsmr = 0x8089406600000004LL, X64_movlmr = 0x0000000080894007LL, X64_movlrm = 0x00000000808B4007LL,
  X64_movqmr = 0x0000000080894807LL, X64_movqspr = 0x0024448948000005LL, X64_movqr = 0xC08B480000000003LL, X64_movqi = 0xB848000000000002LL,
  X64_movi = 0xB840000000000002LL, X64_movqi32 = 0xC0C7480000000003LL, X64_movapsr = 0xC0280F4000000004LL, X64_movqrx = 0xC07E0F4866000005LL,
  X64_movqxr = 0xC06E0F4866000005LL, X64_movqrm = 0x00000000808B4807LL, X64_movsdrr = 0xC0100F40F2000005LL, X64_movsdrm = 0x80100F40F2000005LL,
  X64_movsdmr = 0x80110F40F2000005LL, X64_movssrm = 0x80100F40F3000005LL, X64_movssmr = 0x80110F40F3000005LL, X64_movsxdr = 0xC063480000000003LL,
  X64_movzx8 = 0xC0B60F4000000004LL, X64_movzx8m = 0x80B60F4000000004LL, X64_movzx16m = 0x80B70F4000000004LL, X64_movsx8m = 0x80BE0F4000000004LL,
  X64_movsx16m = 0x80BF0F4000000004LL, X64_neg = 0xD8F7400000000003LL, X64_nop1 = 0x9000000000000001LL, X64_nop2 = 0x9066000000000002LL,
  X64_nop3 = 0x001F0F0000000003LL, X64_nop4 = 0x00401F0F00000004LL, X64_nop5 = 0x0000441F0F000005LL, X64_nop6 = 0x0000441F0F660006LL,
  X64_nop7 = 0x00000000801F0F07LL, X64_not = 0xD0F7400000000003LL, X64_orlrr = 0xC00B400000000003LL, X64_orqrr = 0xC00B480000000003LL,
  X64_popr = 0x5840000000000002LL, X64_pushr = 0x5040000000000002LL, X64_pxor = 0xC0EF0F4066000005LL, X64_ret = 0xC300000000000001LL,
  X64_sete = 0xC0940F4000000004LL, X64_seto = 0xC0900F4000000004LL, X64_setc = 0xC0920F4000000004LL, X64_setl = 0xC09C0F4000000004LL,
  X64_setle = 0xC09E0F4000000004LL, X64_setg = 0xC09F0F4000000004LL, X64_setge = 0xC09D0F4000000004LL, X64_seta = 0xC0970F4000000004LL,
  X64_setae = 0xC0930F4000000004LL, X64_setb = 0xC0920F4000000004LL, X64_setbe = 0xC0960F4000000004LL, X64_subsd = 0xC05C0F40F2000005LL,
  X64_shl = 0xE0D3400000000003LL, X64_shlq = 0xE0D3480000000003LL, X64_shr = 0xE8D3400000000003LL, X64_shrq = 0xE8D3480000000003LL,
  X64_sar = 0xF8D3400000000003LL, X64_sarq = 0xF8D3480000000003LL, X64_shli = 0x00E0C14000000004LL, X64_shlqi = 0x00E0C14800000004LL,
  X64_sari = 0x00F8C14000000004LL, X64_sarqi = 0x00F8C14800000004LL, X64_shri = 0x00E8C14000000004LL, X64_shrqi = 0x00E8C14800000004LL,
  X64_subqrr = 0xC02B480000000003LL, X64_subrr = 0xC02B400000000003LL, X64_subqri = 0xE881480000000003LL, X64_subqr8 = 0x00E8834800000004LL,
  X64_ucomisd = 0xC02E0F4066000005LL, X64_xorqrr = 0xC033480000000003LL, X64_xorrr = 0xC033400000000003LL, X64_xorpd = 0xC0570F4066000005LL,
  X64_xorps = 0xC0570F4000000004LL, X64_xorpsm = 0x05570F4000000004LL, X64_xorpsa = 0x2504570F40000005LL, X64_inclmRAX = 0x00FF000000000002LL,
  X64_jmpx = 0xC524ff4000000004LL, X64_jmpxb = 0xC024ff4000000004LL, X64_movqmi = 0x80C7480000000003LL, X64_movlmi = 0x80C7400000000003LL,
  X64_movsmi = 0x80C7406600000004LL, X64_movbmi = 0x80C6400000000003LL, X86_and8r = 0xC022000000000002LL, X86_sete = 0xC0940F0000000003LL,
  X86_setnp = 0xC09B0F0000000003LL
}

Functions

int32_t arDisp (LIns *ins)
int32_t deprecated_disp (LIns *ins)
 NanoStaticAssert (LIR_eqi+1==LIR_lti &&LIR_eqi+2==LIR_gti &&LIR_eqi+3==LIR_lei &&LIR_eqi+4==LIR_gei &&LIR_eqi+5==LIR_ltui &&LIR_eqi+6==LIR_gtui &&LIR_eqi+7==LIR_leui &&LIR_eqi+8==LIR_geui)
 NanoStaticAssert (LIR_eqd+1==LIR_ltd &&LIR_eqd+2==LIR_gtd &&LIR_eqd+3==LIR_led &&LIR_eqd+4==LIR_ged)
 NanoStaticAssert ((LIR_jt^1)==LIR_jf &&(LIR_jf^1)==LIR_jt)
 NanoStaticAssert ((LIR_xt^1)==LIR_xf &&(LIR_xf^1)==LIR_xt)
 NanoStaticAssert ((LIR_lti^1)==LIR_gti &&(LIR_gti^1)==LIR_lti)
 NanoStaticAssert ((LIR_lei^1)==LIR_gei &&(LIR_gei^1)==LIR_lei)
 NanoStaticAssert ((LIR_ltui^1)==LIR_gtui &&(LIR_gtui^1)==LIR_ltui)
 NanoStaticAssert ((LIR_leui^1)==LIR_geui &&(LIR_geui^1)==LIR_leui)
 NanoStaticAssert ((LIR_ltd^1)==LIR_gtd &&(LIR_gtd^1)==LIR_ltd)
 NanoStaticAssert ((LIR_led^1)==LIR_ged &&(LIR_ged^1)==LIR_led)
bool isSingletonAccSet (AccSet accSet)
bool isCseOpcode (LOpcode op)
bool isLiveOpcode (LOpcode op)
bool isRetOpcode (LOpcode op)
bool isCmovOpcode (LOpcode op)
bool isCmpIOpcode (LOpcode op)
bool isCmpSIOpcode (LOpcode op)
bool isCmpUIOpcode (LOpcode op)
bool isCmpDOpcode (LOpcode op)
bool isCmpOpcode (LOpcode op)
LOpcode invertCondJmpOpcode (LOpcode op)
LOpcode invertCondGuardOpcode (LOpcode op)
LOpcode invertCmpOpcode (LOpcode op)
LOpcode getCallOpcode (const CallInfo *ci)
LOpcode arithOpcodeD2I (LOpcode op)
LOpcode cmpOpcodeD2I (LOpcode op)
LOpcode cmpOpcodeD2UI (LOpcode op)
RegisterMask rmask (Register r)
 verbose_only (void live(LirFilter *in, Allocator &alloc, Fragment *frag, LogControl *);) class StackFilter
 verbose_only (extern const char *regNames[];) verbose_only(extern const char *gpRegNames32[]
 verbose_only (extern const char *gpRegNames8[];) verbose_only(extern const char *gpRegNames8hi[]
Register lsReg (RegisterMask mask)
Register msReg (RegisterMask mask)
Register nextLsReg (RegisterMask &mask, Register r)
Register nextMsReg (RegisterMask &mask, Register r)

Variables

const int8_t isCses []
const uint8_t repKinds []
const LTy retTypes []
const int LARGEST_UNDERRUN_PROT = 32
const size_t LARGEST_BRANCH_PATCH = 16 * sizeof(NIns)

Typedef Documentation

typedef uint32_t nanojit::AccSet
typedef uint8_t nanojit::MiniAccSetVal
typedef uint8_t nanojit::NIns

map tracking the register allocation state at each bailout point (represented by SideExit*) in a trace fragment.

typedef uint32_t nanojit::Register
typedef uint32_t nanojit::RegisterMask

Enumeration Type Documentation

Enumerator:
ABI_FASTCALL 
ABI_THISCALL 
ABI_STDCALL 
ABI_CDECL 
Enumerator:
ARGTYPE_V 
ARGTYPE_I 
ARGTYPE_UI 
ARGTYPE_D 
ARGTYPE_P 
ARGTYPE_B 
Enumerator:
None 
StackFull 
UnknownBranch 
BranchTooFar 
Enumerator:
CALL_INDIRECT 
Enumerator:
LRK_Op0 
LRK_Op1 
LRK_Op2 
LRK_Op3 
LRK_Ld 
LRK_St 
LRK_Sk 
LRK_C 
LRK_P 
LRK_I 
LRK_QorD 
LRK_Jtbl 
LRK_None 
Enumerator:
LOAD_CONST 
LOAD_NORMAL 
LOAD_VOLATILE 
Enumerator:
LTy_V 
LTy_I 
LTy_D 
LTy_P 
Enumerator:
X64_addqrr 
X64_addqri 
X64_addqr8 
X64_andqri 
X64_andqr8 
X64_orqri 
X64_orqr8 
X64_xorqri 
X64_xorqr8 
X64_addlri 
X64_addlr8 
X64_andlri 
X64_andlr8 
X64_orlri 
X64_orlr8 
X64_sublri 
X64_sublr8 
X64_xorlri 
X64_xorlr8 
X64_addrr 
X64_andqrr 
X64_andrr 
X64_call 
X64_callrax 
X64_cmovqno 
X64_cmovqnae 
X64_cmovqnb 
X64_cmovqne 
X64_cmovqna 
X64_cmovqnbe 
X64_cmovqnge 
X64_cmovqnl 
X64_cmovqng 
X64_cmovqnle 
X64_cmovno 
X64_cmovnae 
X64_cmovnb 
X64_cmovne 
X64_cmovna 
X64_cmovnbe 
X64_cmovnge 
X64_cmovnl 
X64_cmovng 
X64_cmovnle 
X64_cmplr 
X64_cmpqr 
X64_cmplri 
X64_cmpqri 
X64_cmplr8 
X64_cmpqr8 
X64_cvtsi2sd 
X64_cvtsq2sd 
X64_cvtss2sd 
X64_cvtsd2ss 
X64_cvtsd2si 
X64_cvttsd2si 
X64_divsd 
X64_mulsd 
X64_addsd 
X64_idiv 
X64_imul 
X64_imuli 
X64_imul8 
X64_jmpi 
X64_jmp 
X64_jmp8 
X64_jo 
X64_jb 
X64_jae 
X64_ja 
X64_jbe 
X64_je 
X64_jl 
X64_jge 
X64_jg 
X64_jle 
X64_jp 
X64_jneg 
X64_jo8 
X64_jb8 
X64_jae8 
X64_ja8 
X64_jbe8 
X64_je8 
X64_jne8 
X64_jl8 
X64_jge8 
X64_jg8 
X64_jle8 
X64_jp8 
X64_jnp8 
X64_jneg8 
X64_leaqrm 
X64_lealrm 
X64_learip 
X64_movlr 
X64_movbmr 
X64_movsmr 
X64_movlmr 
X64_movlrm 
X64_movqmr 
X64_movqspr 
X64_movqr 
X64_movqi 
X64_movi 
X64_movqi32 
X64_movapsr 
X64_movqrx 
X64_movqxr 
X64_movqrm 
X64_movsdrr 
X64_movsdrm 
X64_movsdmr 
X64_movssrm 
X64_movssmr 
X64_movsxdr 
X64_movzx8 
X64_movzx8m 
X64_movzx16m 
X64_movsx8m 
X64_movsx16m 
X64_neg 
X64_nop1 
X64_nop2 
X64_nop3 
X64_nop4 
X64_nop5 
X64_nop6 
X64_nop7 
X64_not 
X64_orlrr 
X64_orqrr 
X64_popr 
X64_pushr 
X64_pxor 
X64_ret 
X64_sete 
X64_seto 
X64_setc 
X64_setl 
X64_setle 
X64_setg 
X64_setge 
X64_seta 
X64_setae 
X64_setb 
X64_setbe 
X64_subsd 
X64_shl 
X64_shlq 
X64_shr 
X64_shrq 
X64_sar 
X64_sarq 
X64_shli 
X64_shlqi 
X64_sari 
X64_sarqi 
X64_shri 
X64_shrqi 
X64_subqrr 
X64_subrr 
X64_subqri 
X64_subqr8 
X64_ucomisd 
X64_xorqrr 
X64_xorrr 
X64_xorpd 
X64_xorps 
X64_xorpsm 
X64_xorpsa 
X64_inclmRAX 
X64_jmpx 
X64_jmpxb 
X64_movqmi 
X64_movlmi 
X64_movsmi 
X64_movbmi 
X86_and8r 
X86_sete 
X86_setnp 

Function Documentation

int32_t nanojit::arDisp ( LIns *  ins  )  [inline]
LOpcode nanojit::arithOpcodeD2I ( LOpcode  op  ) 
LOpcode nanojit::cmpOpcodeD2I ( LOpcode  op  ) 
LOpcode nanojit::cmpOpcodeD2UI ( LOpcode  op  ) 
int32_t nanojit::deprecated_disp ( LIns *  ins  )  [inline]
LOpcode nanojit::getCallOpcode ( const CallInfo *  ci  )  [inline]
LOpcode nanojit::invertCmpOpcode ( LOpcode  op  )  [inline]
LOpcode nanojit::invertCondGuardOpcode ( LOpcode  op  )  [inline]
LOpcode nanojit::invertCondJmpOpcode ( LOpcode  op  )  [inline]
bool nanojit::isCmovOpcode ( LOpcode  op  )  [inline]
bool nanojit::isCmpDOpcode ( LOpcode  op  )  [inline]
bool nanojit::isCmpIOpcode ( LOpcode  op  )  [inline]
bool nanojit::isCmpOpcode ( LOpcode  op  )  [inline]
bool nanojit::isCmpSIOpcode ( LOpcode  op  )  [inline]
bool nanojit::isCmpUIOpcode ( LOpcode  op  )  [inline]
bool nanojit::isCseOpcode ( LOpcode  op  )  [inline]
bool nanojit::isLiveOpcode ( LOpcode  op  )  [inline]
bool nanojit::isRetOpcode ( LOpcode  op  )  [inline]
bool nanojit::isSingletonAccSet ( AccSet  accSet  )  [inline]
Register nanojit::lsReg ( RegisterMask  mask  )  [inline]
Register nanojit::msReg ( RegisterMask  mask  )  [inline]
nanojit::NanoStaticAssert ( (LIR_lti^1)  = =LIR_gti &&(LIR_gti^1)==LIR_lti  ) 
nanojit::NanoStaticAssert ( LIR_eqi+  1 = =LIR_lti &&LIR_eqi+2==LIR_gti &&LIR_eqi+3==LIR_lei &&LIR_eqi+4==LIR_gei &&LIR_eqi+5==LIR_ltui &&LIR_eqi+6==LIR_gtui &&LIR_eqi+7==LIR_leui &&LIR_eqi+8==LIR_geui  ) 
nanojit::NanoStaticAssert ( (LIR_lei^1)  = =LIR_gei &&(LIR_gei^1)==LIR_lei  ) 
nanojit::NanoStaticAssert ( (LIR_ltui^1)  = =LIR_gtui &&(LIR_gtui^1)==LIR_ltui  ) 
nanojit::NanoStaticAssert ( LIR_eqd+  1 = =LIR_ltd &&LIR_eqd+2==LIR_gtd &&LIR_eqd+3==LIR_led &&LIR_eqd+4==LIR_ged  ) 
nanojit::NanoStaticAssert ( (LIR_led^1)  = =LIR_ged &&(LIR_ged^1)==LIR_led  ) 
nanojit::NanoStaticAssert ( (LIR_leui^1)  = =LIR_geui &&(LIR_geui^1)==LIR_leui  ) 
nanojit::NanoStaticAssert ( (LIR_ltd^1)  = =LIR_gtd &&(LIR_gtd^1)==LIR_ltd  ) 
nanojit::NanoStaticAssert ( (LIR_jt^1)  = =LIR_jf &&(LIR_jf^1)==LIR_jt  ) 
nanojit::NanoStaticAssert ( (LIR_xt^1)  = =LIR_xf &&(LIR_xf^1)==LIR_xt  ) 
Register nanojit::nextLsReg ( RegisterMask &  mask,
Register  r 
) [inline]
Register nanojit::nextMsReg ( RegisterMask &  mask,
Register  r 
) [inline]
RegisterMask nanojit::rmask ( Register  r  )  [inline]
nanojit::verbose_only ( extern const char *gpRegNames8;  []  )  const
nanojit::verbose_only ( extern const char *regNames;  []  )  const
nanojit::verbose_only ( void live(LirFilter *in, Allocator &alloc, Fragment *frag, LogControl *);   ) 

Variable Documentation

const int8_t nanojit::isCses[]
const size_t nanojit::LARGEST_BRANCH_PATCH = 16 * sizeof(NIns)
const uint8_t nanojit::repKinds[]